ADD - Add

Operation:Source + Destination -> Destination Syntax:ADD Dn, < ea > Attributes:Size = (Byte, Word, Long)

Description

Adds the source operand to the destination operand using binary addition and stores the result in the destination location. The size of the operation may be specified as byte, word, or long. The mode of the instruction indicates which operand is the source and which is the destination, as well as the operand size.

Condition Codes

X	N	Z	V	C
x	x	x	x	x

X — Set the same as the carry bit. N — Set if the result is negative; cleared otherwise. Z — Set if the result is zero; cleared otherwise. V — Set if an overflow is generated; cleared otherwise. C — Set if a carry is generated; cleared otherwise.

Instruction Format

15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1.2+^.^	1 1.2+^.^	1 1.2+^.^	0 1.2+^.^	1 3.2+^.^	REGISTER 3.2+^.^	OPMODE 6.1+^.^	EFFECTIVE ADDRESS 3.1+^.^	MODE 3.1+^.^	REGISTER

Instruction Fields::: Register field—Specifies any of the eight data registers.

Opmode field

Byte	Word	Long	Operation
000 100	001 101	010 110	< ea > + Dn -> Dn Dn + < ea > → < ea >

If the location specified is a source operand, all addressing modes can be used as listed in the following tables:

Addressing	Mode	Register	Addressing	Mode	Register
Dn	000	reg. number:Dn	(xxx).W	111	000
An	001	reg. number:An	(xxx).L	111	001
(An)	010	reg. number:An	#<data>	—	—
(An)+	011	reg. number:An
—(An)	100	reg. number:An
(d16, An)	101	reg. number:An	(d16, PC)	—	—
(d8, An, Xn)	110	reg. number:An	(d8, PC, Xn)	—	—

MC68020 and upwards only

Addressing	Mode	Register	Addressing	Mode	Register
(bd,An,Xn)	110	reg. number:Dn	(bd,PC,Xn)	—	—
([bd,An,Xn],od)	110	reg. number:An	([bd,PC,Xn],od)	—	—
([bd,An],Xn,od)	110	reg. number:An	([bd,PC],Xn,od)	—	—

If the location specified is a destination operand, only memory alterable addressing modes can be used as listed in the following tables:

Addressing	Mode	Register	Addressing	Mode	Register
Dn	—	—	(xxx).W	111	000
An	—	—	(xxx).L	111	001
(An)	010	reg. number:An	#<data>	—	—
(An)+	011	reg. number:An
–(An)	100	reg. number:An
(d16,An)	101	reg. number:An	(d16,PC)	—	—
(d8,An,Xn)	110	reg. number:An	(d8,PC,Xn)	—	—

MC68020 and upwards only

Addressing	Mode	Register	Addressing	Mode	Register
(bd,An,Xn)*	110	reg. number:An	(bd,PC,Xn)	—	—
([bd,An,Xn],od)	110	reg. number:An	([bd,PC,Xn],od)	—	—
([bd,An],Xn,od)	110	reg. number:An	([bd,PC],Xn,od)	—	—

NOTE The Dn mode is used when the destination is a data register; the destination < ea > mode is invalid for a data register. ADDA is used when the destination is an address register. ADDI and ADDQ are used when the source is immediate data. Most assemblers automatically make this distinction.